Atmel AT85DVK-07 Especificações descarregar pdf (Página 206)

206

AT85C51SND3Bx

7632A–MP3–03/06

Reset Value = 1111 1110b

Reset Value = 1111 1111b

6 EORM

End Of Response Interrupt Mask Bit

Set to prevent EORI flag from generating an interrupt.

Clear to allow EORI flag to generate an interrupt.

5 EOCM

End Of Command Interrupt Mask Bit

Set to prevent EOCI flag from generating an interrupt.

Clear to allow EOCI flag to generate an interrupt.

4 EOFM

End Of Frame Interrupt Mask Bit

Set to prevent EOFI flag from generating an interrupt.

Clear to allow EOFI flag to generate an interrupt.

3 WFRM

Whole FIFO Ready Interrupt Mask Bit

Set to prevent WFRI flag from generating an interrupt.

Clear to allow WFRI flag to generate an interrupt.

2 HFRM

Half FIFO Ready Full Interrupt Mask Bit

Set to prevent HFRI flag from generating an interrupt.

Clear to allow HFRI flag to generate an interrupt.

1 EOBM

End Of Block Interrupt Mask Bit

Set to prevent EOBI flag from generating an interrupt.

Clear to allow EOBI flag to generate an interrupt.

0 -

Reserved

The value read from this bit is always 0. Do not set this bit.

Table 228. MMCMD Register

MMCMD (1.B7h) – MMC Command Register

7 6 5 4 3 2 1 0

MC7 MC6 MC5 MC4 MC3 MC2 MC1 MC0

Bit

Number

Bit

Mnemonic

Description

7-0 MC7:0

MMC Command Receive Byte

Output (read) register of the response FIFO.

MMC Command Transmit Byte

Input (write) register of the command FIFO.

Table 229. MMDAT Register

MMDAT (1.B6h) – MMC Data Register

7 6 5 4 3 2 1 0

MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0

Bit

Number

Bit

Mnemonic

Description

7-0 MD7:0

MMC Data Byte

Input (write) or output (read) register of the data FIFO.

Bit

Number

Bit

Mnemonic Description

1 2 ... 201 202 203 204 205 206 207 208 209 210 211 ... 262 263

Comentários a estes Manuais

Sem comentários

Atmel AT85DVK-07 Especificações Página 206

Comentários a estes Manuais

Manuais e produtos relacionados com Redes Atmel AT85DVK-07