Atmel AVR AT90S8515-4 Especificações descarregar pdf (Página 16)

AT90S8515

0841G–09/01

The X-, Y-, or the Z-register is decremented before the operation. Operand address is

the decremented contents of the X-, Y-, or the Z-register.

Data Indirect with Post-

increment

Figure 16. Data Indirect Addressing with Post-increment

The X-, Y-, or the Z-register is incremented after the operation. Operand address is the

content of the X-, Y-, or the Z-register prior to incrementing.

Constant Addressing Using

the LPM Instruction

Figure 17. Code Memory Constant Addressing

Constant byte address is specified by the Z-register contents. The 15 MSBs select word

address (0 - 4K), the LSB selects low byte if cleared (LSB = 0) or high byte if set (LSB =

1).

$000

$FFF

PROGRAM MEMORY

15 1 0

Z-REGISTER

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 111 112

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